RISC-V

October 22, 2019

Semicon Europa adds design and smart-transportation seminars

The ESD Alliance is adding design and transportation-systems streams to the Semicon Europa 2019 show.
Article  |  Topics: Blog - EDA, Embedded  |  Tags: , , , , , ,   |  Organizations:
June 18, 2019

RISC-V firms aim for lower-cost design starts

Andes and SiFive attempt to lower the barriers to entry for SoC designs based on RISC-V processor cores.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , ,   |  Organizations: ,
May 28, 2019

DAC 2019 preview: OneSpin Solutions

OneSpin is bringing recent product launches to DAC and will have technical experts presenting within the conference's Designer Track.
Article  |  Topics: Blog - EDA, - Verification  |  Tags: , , , ,   |  Organizations: ,
May 24, 2019

OneSpin extends line-up for AI FPGA and RISC-V verification

The formal specialist is extending its line for Intel FPGAs that target areas such as AI/ML and HPC, and building out a RISC-V suite focused on ISA compliance.
April 2, 2019

DVCon China 2019 preview: SmartDV

RISC-V VIP offerings headline the verification specialist’s presence in Shanghai later this month.
Article  |  Topics: Blog - EDA, - Standards, Verification  |  Tags: , , , ,   |  Organizations: ,
March 26, 2019

DVCon Europe looks to software in call for papers

DVCon Europe has added embedded software, digital twin, machine learning, and RISC-V to the topics the conference organizers want to cover.
Article  |  Topics: Blog - EDA, Embedded, IP  |  Tags: , , , ,   |  Organizations:
February 22, 2019

DVCon USA 2019 preview: OneSpin

OneSpin will focus at DVCon on its formal integrity verification platform for the RISC-V open-source which aims to speed up the core's adoption. The company will also feature the solution with a partner at EmbeddedWorld.
Article  |  Topics: Blog - EDA, - Verification  |  Tags: , , , ,   |  Organizations: ,
February 19, 2019

DVCon USA 2019 preview: SmartDV

The verification IP specialist is focusing on its new products for RISC-V verification and for emulation platforms next week in San Jose.
Article  |  Topics: Conferences, Verification  |  Tags: , , ,   |  Organizations: ,
December 6, 2018

Microchip opts for RISC-V cores in SoC FPGA

Microsemi has put multiple RISC-V cores into a new generation of SoC FPGAs, intended for embedded systems that need to run Linux.
Article  |  Topics: Blog - Embedded, IP  |  Tags: , , ,   |  Organizations: ,
May 1, 2018

Andes teams with Imperas and UltrasoC for RISC-V

Andes Technology has expanded support for its RISC-V processor cores through deals with Imperas and UltraSoC.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , , ,   |  Organizations: , ,

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