RISC-V

April 1, 2020

Coronavirus Resources: OneSpin Solutions

The verification specialist is adding more online resources to help engineers working from home during the Covid-19 pandemic.
Article  |  Topics: Blog Topics, Blog - EDA, - Verification  |  Tags: , , , ,   |  Organizations:
February 27, 2020

DVCon US 2020 preview: Breker Verification Systems

Portable stimulus pioneer Breker will feature across the DVCon program also highlighting its work with RISC-V.
Article  |  Topics: Blog - EDA, - Verification  |  Tags: , , , ,   |  Organizations: ,
February 24, 2020

DVCon US 2020 preview: SmartDV

The latest in MIPI and DDR design and verification IP as well as protocol debug are highlights in SmartDV's DVCon program.
Article  |  Topics: Blog - IP, - Verification  |  Tags: , , , , , , ,   |  Organizations: ,
February 19, 2020

Embedded World 2020 preview: Mentor

Six papers, a dedicated automotive sessions and demos including the use of the Nucleus for RISC-V are among highlights in Mentor's Embedded World agenda.
December 11, 2019

Support for RISC-V expands at summit

This week’s RISC-V Summit in California has seen an expansion to the open-source portfolio being built around the architecture as well as increased support from software vendors such as Wind River.
December 10, 2019

Breker adds automated system integration test generation for RISC-V

App joins Portable Stimulus specialist's Trek5 family to reduce manual test writing during verification on designs for the fast-growing RISC-V open-source processor.
October 22, 2019

Semicon Europa adds design and smart-transportation seminars

The ESD Alliance is adding design and transportation-systems streams to the Semicon Europa 2019 show.
Article  |  Topics: Blog - EDA, Embedded  |  Tags: , , , , , ,   |  Organizations:
June 18, 2019

RISC-V firms aim for lower-cost design starts

Andes and SiFive attempt to lower the barriers to entry for SoC designs based on RISC-V processor cores.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , ,   |  Organizations: ,
May 28, 2019

DAC 2019 preview: OneSpin Solutions

OneSpin is bringing recent product launches to DAC and will have technical experts presenting within the conference's Designer Track.
Article  |  Topics: Blog - EDA, - Verification  |  Tags: , , , ,   |  Organizations: ,
May 24, 2019

OneSpin extends line-up for AI FPGA and RISC-V verification

The formal specialist is extending its line for Intel FPGAs that target areas such as AI/ML and HPC, and building out a RISC-V suite focused on ISA compliance.

PLATINUM SPONSORS

Synopsys Cadence Design Systems Mentor - A Siemens Business
View All Sponsors