November 23, 2022
The Austin-based start-up used Siemens EDA software to deploy a cutting-edge Smart Substrate based on advanced packaging technology.
November 8, 2021
University of Florida researcher proposes third-party checks on chiplets to demonstrate they are free of trojans.
December 21, 2020
Work by the University of Toronto and Arm presented at IEDM indicates plasmonics could be a viable contender for high-speed chip-chip communications.
April 4, 2019
An Open Compute Project group working on multichip integration sees a combination of parallel and serial interfaces being important for interchip communication.
June 27, 2018
It’s the back-end that needs work as system-level considerations begin to dominate design, Qualcomm’s vice president of engineering said at DAC.
April 10, 2018
Cadence Design Systems has made enhancements to its Virtuoso mixed-signal layout tool at both the system-level and nanometer-design levels for its 18.1 release.
April 24, 2015
Mentor Graphics is working on technology to analyse the effects of mechanical stress on integrated circuits, describing progress at the company's U2U conference.
March 10, 2015
'Bling' for fashionistas and the B Ark lot. Apple Watch limps as the S1 SIP fails to offer convincing battery life. Silicon shortfall still dogs wearables.