Chips Alliance

August 31, 2022

Intel and partners join for RISC-V development push

Intel's Pathfinder for RISC-V is intended to boost the use of the architecture among a wider range of SoC design teams.

Article | Topics: Blog - EDA, Embedded, IP | Tags: embedded processor, FPGA prototyping, IDE, open-source hardware, RISC-V, server accelerator | Organizations: Cadence Design Systems, Chips Alliance, Codasip, Imperas, Intel, OpenHW, Siemens EDA

July 18, 2022

Open-source EDA grapples with the incentives issue

As the project that funded OpenRoad draws to a close, experts pondered its wider future at the 59th DAC.

Article | Topics: Blog - EDA, IP | Tags: DAC 2022, design flow, domain-specific architecture, hardware accelerator, open source, open-source EDA | Organizations: Cadence Design Systems, Chips Alliance, DARPA, Intel, Qualcomm

PLATINUM SPONSORS

Synopsys

Cadence Design Systems

Siemens EDA

View All Sponsors