mixed-signal design

September 21, 2022

Agile Analog adds digital library for easier porting

Agile Analog has launched its own digital standard cell library, designed to be used in the control circuits for analog blocks that form the IP company’s main offering.
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September 14, 2022

X-Fab to add 130nm SiGe with IHP deal

X-Fab is using IHP technology to add a 130nm silicon germanium process to its offering.
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July 12, 2022

Siemens compiles analog into simulation for faster debug

Siemens EDA has launched a second version of its Symphony simulation environment designed to support quicker debug cycles.
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July 12, 2022

Agile starts to build out analog portfolio with tool-based strategy

Agile Analog's oscillator IP sees the company focus on IP created with its own circuit creation and porting tool.
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June 16, 2022

TSMC certifies Aprisa for N5 and N4

TSMC has certified the Aprisa place-and-route software from Siemens Digital Industries Software for the N5 and N4 process technologies.
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May 24, 2022

Saber models aim for ADI power chips

Synopsys and Analog Devices have agreed to provide model libraries for the chipmaker's DC/DC ICs and power regulators that work with the Saber simulation tool.
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May 21, 2021

Cadence pushes its FastSpice to 32 cores

Cadence has launched a reworked FastSpice engine designed to split work across multiple cores more efficiently.
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February 4, 2021

Pulsic goes freemium with analog-preview tool

Pulsic has adopted the freemium approach with a tool that gives designers of analog circuits previews of how they will be implemented on-chip.
October 29, 2019

Mentor scales AMS cloud verification to 10,000 cores

Tests on Microsoft Azure's cloud have shown Mentor's AMS simulation tools can run across thousands of processors with near-linear scaling.
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April 24, 2019

May meeting to push for UVM analog extensions

Accellera is trying to standardize extensions to UVM for mixed-signal design.
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