silicon interposer


March 24, 2015

Mentor unites chip-to-package flow with Xpedition Package Integrator

Flow draws on existing strengths in Xpedition, Valor, Nimbic and Flotherm among others to optimize 3D design projects and improve cross-disciplinary communication.
December 16, 2013

TSMC hints at glass interposer for mobile SoCs

Glass may be the high frequency interposer option given silicon concerns about power and noise. TSMC adds another pathfinder to its 3D arsenal.
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November 13, 2013

TSMC succession plan emphasizes stability

TSMC stays the course with new co-CEOs as Morris Chang retains executive leadership for now while finFET, 3D and other new technologies settle in.
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November 7, 2013

TSMC demonstrates readiness for 3D-IC

Research projects to verify methodologies, address third-party integration challenges and add a low-cost interposer-like technology to the 3D-IC family make their mark.
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November 4, 2013

Amkor keeps question mark next to ‘full’ 3D-IC in 2016

Stacked 3D-IC memory-on-logic is on the packaging company's roadmap, but there are still yield hurdles to scale at the MEOL.
December 13, 2012

3D-IC integration prospects improving, say IEDM researchers

3D-IC integration techniques such as the use of TSVs, die stacking and interposers are unlikely to limit performance, according to research from TSMC and IBM
Article  |  Topics: Blog Topics, Conferences, Design to Silicon  |  Tags: , , , , , ,   |  Organizations: ,
November 16, 2012

3DIC – the advantages and the challenges of vertical integration

The advantages and challenges of 3D IC integration, as we add vertical functional integration options to the traditional planar integration brought by the progress of Moore's Law.
March 22, 2012

TSMC Altera heterogeneous integration is cool but is it 3D?

This looks more like 2.5D silicon interposer-based technology to us, though it is a major and necessary advance
Article  |  Topics: Commentary, Design to Silicon, Blog - EDA, PCB  |  Tags: , ,

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