April 29, 2022
Variable lifetimes are an apparently basic but also tricky feature within the verification language.
April 27, 2022
The NVMe 2.0 specification has introduced two namespace options that boost SSD performance while optimizing storage life.
December 6, 2021
Breker will highlight its latest work on stress-testing processor, storage and I/O architectures during DAC 2021 this week.
June 16, 2021
Samsung described at VLSI Symposia how it has used two further forms of stacking to increase flash capacity.
May 20, 2021
Unisantis aims to use its vertical transistor design in a novel form of DRAM that could improve density four-fold.
December 17, 2020
At IEDM this year, Macronix showed how a 3D architecture may bring back NOR flash, which stopped scaling a decade ago.
January 24, 2020
SureCore has started running 30-day trials of its low-power memory compiler.
September 2, 2019
Concerns that the diplomatic stand-off between Seoul and Tokyo could hit the supply chain rose again this weekend as South Korean politicians made a surprise visit to disputed islands.
August 5, 2019
The Chinese memory module specialist will preview the 2020 launch of its new solution based on the ultra low latency XL-Flash technology from Toshiba.
July 2, 2019
The verification IP is the first to become commercially available for the bus interface backed by companies such as AMD, Google, IBM, Micron and Xilinx.