September 21, 2022
Nvidia revealed at its Fall GTC work the company has done on a bidirectional energy-saving chiplet interconnect that could hit the equivalent of 50Gbit/s per line.
September 8, 2022
The system-in-package and module trends in system design promote bringing together physical (DRC) and electrical (LVS) verification.
June 17, 2021
A de facto standard for exchanging thermal information about designs has become JEDEC standard JEP181.
January 19, 2021
Design-services company Sondrel is recommending teams start earlier on package design to avoid delays after IC tapeout.
June 27, 2018
It’s the back-end that needs work as system-level considerations begin to dominate design, Qualcomm’s vice president of engineering said at DAC.
June 5, 2017
Mentor, a Siemens business, has formed an alliance with foundries and OSAT providers and launched a flow that brings IC and package design together.
May 30, 2017
Cadence Design Systems has brought its chip- and PCB-design environments closer together as the shift towards multichip packages gains pace.
May 19, 2017
Machine learning, smarter cars, and the infrastructure to support a sixfold increase in IoT and edge devices have helped push up the number of teams doing finFET designs to more than 100, according to Tom Beckley of Cadence.
June 26, 2015
Research by Professor John Rogers' group at the University of Illinois is leading to biodegradable electronics, for both defense and medical applications.
April 24, 2015
Mentor Graphics is working on technology to analyse the effects of mechanical stress on integrated circuits, describing progress at the company's U2U conference.