2nm


August 23, 2021

IEDM 2021 publishes course schedule

Aiming for a primarily physical event in the fall, organisers of the 2021 IEDM have published the tutorial and short-core schedule.
Article  |  Topics: Blog - EDA  |  Tags: , , , ,   |  Organizations:
June 15, 2021

Imec cuts transistor gap to less than 20nm with forksheets

Imec showed at VLSI Symposia a process flow that can cut the gap between complementary transistors to less than 20nm.
Article  |  Topics: Blog - EDA  |  Tags: , , , , , ,   |  Organizations:
June 15, 2020

EDA in the cloud boosts DRC iterations for AMD

AMD worked with Microsoft and Azure to cut DRC runtimes and control memory usage for a 7nm cloud-based design.
Article  |  Topics: Blog Topics  |  Tags: , , , , , , , , ,   |  Organizations: , , ,

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