PAM4


September 21, 2022

Nvidia proposes split-level link for chiplet interconnect

Nvidia revealed at its Fall GTC work the company has done on a bidirectional energy-saving chiplet interconnect that could hit the equivalent of 50Gbit/s per line.
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January 17, 2017

DesignCon 2017 preview: Mentor Graphics

DesignCon 2017 takes place from Jan 31 to Feb 2 at the Santa Clara Convention Center with its usual focus on PCB design and implementation.
April 4, 2016

HyperLynx made broader and easier to use

HyperLynx from Mentor Graphics has moved into a new generation with more integrated features beyond PI and SI, and an easier to use GUI.
January 14, 2016

DesignCon 2016 preview: Mentor Graphics

HyperLynx leads the way for vendor at DesignCon with booth demos and a day-long modeling and analysis seminar.

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