configurable processors

August 3, 2022

Imperas releases RISC-V coverage library as open source

Imperas Software has published an open-source functional-coverage library for RISC-V cores.
June 29, 2022

SoC project uses eFPGA to extend DSP instructions

R&D multicore processor demonstrates programmable extensions for DSP.
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December 6, 2021

Imperas pulls together tools for RISC-V verification

Imperas has put together a suite of tools to verify that custom RISC-V processor cores remain compatible with the common infrastructure behind the open-source instruction set.
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December 11, 2019

Support for RISC-V expands at summit

This week’s RISC-V Summit in California has seen an expansion to the open-source portfolio being built around the architecture as well as increased support from software vendors such as Wind River.
October 8, 2019

Arm to let customers bolt instructions onto V8 processors

Arm has relented on its opposition to custom instructions with the decision to let customers add them to V8-M processors.
June 18, 2019

RISC-V firms aim for lower-cost design starts

Andes and SiFive attempt to lower the barriers to entry for SoC designs based on RISC-V processor cores.
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January 23, 2018

Codasip updates processor-architecture tools

Codasip has launched the seventh generation of its Studio software for processor design and tuning, aiming to take advantage of the interest in RISC-V as a core instruction set for customized processors.
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December 1, 2017

Workshop sees the RISC-V ecosystem expand

The RISC-V workshop in California at the end of November 2017 provided the opportunity for Western Digital to commit its own work on processors for internal use to the open-source architecture and for the ecosystem of off-the-shelf cores and tools to expand.
June 12, 2016

What’s the shortest time in the universe?

“It’s the time between putting out an open-source ARM core and getting a letter from an ARM lawyer,” says UC Berkeley professor Krste Asanovic. So, some design teams are turning to IP that started out as open source to provide more scope for experimentation.
October 6, 2015

Tensilica vision processor cuts power through memory changes

Memory efficiency has driven the design of the latest video and image processor core developed by Cadence Tensilica.

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