Cadence has launched a tool that the company claims can speed up implementation by applying machine learning across the flow.
Cadence Design Systems
Cadence has launched a reworked FastSpice engine designed to split work across multiple cores more efficiently.
The formal apps start-up has built strong positions in automotive and RISC-V and will strengthen Siemens in competition with Cadence.
Cadence Design Systems has designed a new custom processor for the Z2 emulator and employed Xiliinx UltraScale+ for the prototyping platform.
Pulsic has adopted the freemium approach with a tool that gives designers of analog circuits previews of how they will be implemented on-chip.
Cadence has developed a stimulus optimizer based on neural networks to try to improve the runtime of constrained-random verification runs.
Talks in the Design-on-Cloud Pavilion at this year’s DAC demonstrated how the question over its usage is not so much whether design could or should migrate to the cloud but how to optimize cost and performance when it’s there.
Cadence Design Systems has agreed to buy the AWR RF-design company from its current owner National Instruments for approximately $160m.
Cadence has followed its launched of a parallelizable EM simulator with one that focuses on the thermal behavior of ICs through to multi-PCB assemblies.
Moving design and verification activities into the cloud poses challenges. Next month's inaugural ES Design West will offer practical guidance.
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