DVCon Europe best paper speeds up memory-controller tests

By Chris Edwards |  No Comments  |  Posted: January 6, 2023
Topics/Categories: Blog - EDA, IP  |  Tags: , , , ,  | Organizations: ,

The winner of the best-paper award at the Design and Verification Conference & Exhibition Europe (DVCon Europe) held late last year went to a team from Samsung based in India, describing their work on a reusable agent for testing the behavior of error-correcting memory circuits.

The first conference to be held fully in person since the pandemic saw delegates attending from 115 different companies, based in 36 different countries. “Meeting in-person after a gap of three years was exciting and this was a lively show with enthusiastic networking,” said Sumit Jha, general chair.

In the paper entitled ‘A Generic Configurable Error Injection Agent for On-Chip Memories’, Niharika Sachdeva described a coverage-aware, simulation-focused strategy for testing memory controllers with injectable error conditions to gauge how well they can recover. They claimed their approach reduces overall simulation time by using coverage to avoid overcasting of locations or conditions.

Memory agent

The agent was built for the UVM environment, using coverage collection to avoid the simulation time from exploding as memory sizes increase but still make it possible to test each bit at least once. According to the group, the agent made it possible to find critical, corner-case bugs in a memory BIST controller within a week that would otherwise have needed directed error-injection scenarios to uncover.

According to the team, the retargetability of the module means it is possible to be up and running with the agent on a new memory controller within a day versus a week of work using conventional approaches. It also saves time on designing error-injection scenarios. The group says they are now working on optimizing the test-pattern generation and are looking to test the agent not just on behavioral models but memory netlists.

The memory-test paper featured among a number of papers on UVM-centric verification alongside tracks on IP-XACT, functional safety, and other areas. DVCon Europe will mark its 10th anniversary next year and will be held in Munich on 14th and 15th November 2023, followed by the SystemC Evolution Day on 16th .

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