Open and propietary verification tools home in on RISC-V core quality
DAC provided a forum for the growing number of verification efforts focused on checking the architectural compliance and overall RTL quality of RISC-V processors.
Imperas
Support for RISC-V expands at summit
This week’s RISC-V Summit in California has seen an expansion to the open-source portfolio being built around the architecture as well as increased support from software vendors such as Wind River.
Andes teams with Imperas and UltrasoC for RISC-V
Andes Technology has expanded support for its RISC-V processor cores through deals with Imperas and UltraSoC.
Workshop sees the RISC-V ecosystem expand
The RISC-V workshop in California at the end of November 2017 provided the opportunity for Western Digital to commit its own work on processors for internal use to the open-source architecture and for the ecosystem of off-the-shelf cores and tools to expand.
IP takes center stage in push towards systems engineering
At DAC 2014, some 30 per cent of exhibitors are IP suppliers, offering design services or both, demonstrating how system-level design is about building on what has gone before.
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