Alps Alpine composes capacitance IC with Symphony
The company says the mixed-signal platform enabled a 5X improvement in verification productivity.
Chipmaker
Semidynamics pushes configurability on RISC-V core for HPC
Processor IP company will incorporate custom instructions and other changes in its superscalar core, which includes a novel memory unit for sparse matrices.
Arm signs sub-2nm deal with Intel foundry operation
Intel Foundry Services has signed a deal with Arm that will see the two companies work on a program of system and design-technology co-optimization.
Curvilinear layout looks to wider adoption with mask speedups
Nvidia's move into software aimed at mask production and EDA looks to be part of a wider shift to improve yields.
DVCon Europe best paper speeds up memory-controller tests
The winner of the best-paper award at DVCon Europe went to a team from Samsung based in India, describing their work on a reusable agent for testing the behavior of error-correcting memory circuits.
Chipletz pushes packaging design for AI, HPC and immersive use-cases
The Austin-based start-up used Siemens EDA software to deploy a cutting-edge Smart Substrate based on advanced packaging technology.
Nvidia proposes split-level link for chiplet interconnect
Nvidia revealed at its Fall GTC work the company has done on a bidirectional energy-saving chiplet interconnect that could hit the equivalent of 50Gbit/s per line.
Cadence extends AI to verification data with unified database
Cadence has brought the inputs for its AI-driven tools under the umbrella of a big-data collection platform and added functional verification to the list of products that use machine learning.
X-Fab to add 130nm SiGe with IHP deal
X-Fab is using IHP technology to add a 130nm silicon germanium process to its offering.
Intel and partners join for RISC-V development push
Intel's Pathfinder for RISC-V is intended to boost the use of the architecture among a wider range of SoC design teams.