Chipmaker

Verification specialist's DVCon activities are headlined by a panel on emulation and static verification.

Mentor Graphics chairman and CEO Wally Rhines will deliver the DVCon keynote as the vendor sets a deep agenda for the conference.

ARM and Ceva have both aimed at the need for to juggle control code and DSP in the upcoming LTE-Advanced and 5G with their latest processor core architectures.

The Calibre vendor will have a strong technical presence at the leading lithography conference taking place in late February in San Jose.

The Prpl Foundation has published a guide to techniques it claims will improve the security of embedded systems.

According to ARM's Greg Yeric in his keynote at IEDM, even with cost improvements for multiple patterning, fewer designs will see the benefit of further silicon node scaling. Savings will come from design.

Cortus has added to its version 2 architecture a processor core that offers hardware support for floating-point code.

Mentor's Greg Aldrich describes how test's market leader is driving down cost in the billion-gate era by rethinking and extending existing technologies

But the bridge standard's European backers still need greater support from the big EDA vendors.

High powered alliance develops TLM standards to address growing automotive and IoT concerns.