DVCon Europe keynotes focus on connectivity
DVCon Europe's keynotes will examine verification issues in connected cars and 5G networks.
5G
Parasitic extraction challenges intensify for 5G
5G IC designs have needed aggressive innovation across many elements and more use of FD-SOI that both pose parasitic extraction challenges.
Teledyne pushes for optical for remote RF heads
Teledyne e2v has demonstrated a prototype optical link that the company believes could replace electrical signaling for remote RF heads.
IRPS continues with virtual format for 2021
IRPS will use a virtual format for its March conference and will take in the reliability of emerging as well as more established technologies.
Open-RAN puts more focus on emulation in testing programs
Recent developments have made Open-RAN look more attractive as a way of implementing 5G systems. This is helping to drive a shift-left in verification and test.
Deploying pre- and post-silicon verification and test for 5G designs
A flexible and still evolving range of 5G standards requires methodologies that can handle massive test.
CEVA splits vectors for more efficient 5G
CEVA has reworked its XC architecture to provide what the company claims is the kind of performance boost needed to handle phase-two 5G applications once Release 17 rolls out.
Verifying in an HLS context for AI and ML designs
A SystemC/C++ app from a library that extends the OneSpin 360 DV-Verify platform was used by ML IP specialist NanoSemi on a 5G/WiFi project.
Achronix builds machine learning IP into eFPGA
Achronix has incorporated direct support for machine learning into the latest version of its eFPGA architecture.
Embedded FPGAs start to take hold in SoC
The embedded FPGA is beginning to find a market, with communications leading the way but machine learning likely to drive further adoption.
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