Three key ways to reduce silicon test costs
Mentor's Greg Aldrich describes how test's market leader is driving down cost in the billion-gate era by rethinking and extending existing technologies
At last year’s DAC, leading EDA analyst Gary Smith said chip design had run into a big problem: it was already too expensive to be worthwhile for most companies. Soon afterwards, three companies rang to tell him that the figures were too pessimistic: it was not costing in the region of $75m but perhaps just […]