virtual prototyping

May 28, 2019

Cadence expands Protium for rack-based prototyping

Cadence has developed a version of its Protium prototyping engine that supports larger designs and which is intended to go into data-center racks.
July 27, 2018

Verification engineers embrace emulation for the shift left

In a panel session at June's DAC, Synopsys customers talked about some of the ways they make verification more efficient and bring technologies such as formal, emulation, and simulation together.
July 5, 2018

Cloud makes hardware acceleration more accessible

After the moves by Cadence and Mentor, emulation in the cloud may only be the start of providing verification acceleration as a service.
September 22, 2017

5G and automotive provide applications focus for DVCon Europe

The massive complexity of 5G and automotive systems and the need for advanced verification techniques set the scene for DVCon Europe this year.
June 20, 2017

Siemens sees Mentor helping to build fast digital twins

An emulator that extends the reach of hardware acceleration into the world of multiphysics analysis could result from the merger of Siemens PLM Software with Mentor.
Article  |  Topics: Blog - EDA, Electrical Design, Embedded, PCB  |  Tags: , , , , , , , ,   |  Organizations: ,
January 10, 2017

Virtual prototyping case study focuses on address mapping, clocking and QoS in DDR memory interface optimisation

Case study applies virtual prototyping to optimise address mapping, clock frequency, and Quality of Service configurations to meet DDR performance goals.
Article  |  Topics: ESL/SystemC, Product  |  Tags: , ,   |  Organizations:
December 19, 2016

White paper discusses optimising the efficiency of DDR memory subsystems

DDR memory subsystems need careful optimisation as demands on memory grow more rapidly than off-chip bandwidth.
Article  |  Topics: Design to Silicon, Blog - IP  |  Tags: , ,   |  Organizations:
April 4, 2016

HyperLynx made broader and easier to use

HyperLynx from Mentor Graphics has moved into a new generation with more integrated features beyond PI and SI, and an easier to use GUI.
November 12, 2015

DVCon Europe: UVM-SystemC backers ready first draft

But the bridge standard's European backers still need greater support from the big EDA vendors.
November 12, 2015

DVCon Europe: Getting TLM to cope with proliferating ECUs and serial protocols

High powered alliance develops TLM standards to address growing automotive and IoT concerns.

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