Ethernet


May 21, 2019

Achronix deploys network on chip for faster FPGAs

Achronix is introducing an FPGA architecture that pulls a full network-on-chip into the programmable-logic fabric combined with hardened matrix-math processors for AI.
Article  |  Topics: Blog - IP, PCB  |  Tags: , , , , , , , ,   |  Organizations:
October 10, 2016

Cadence packages VIP for ten protocols

Cadence Design Systems has released a set of ten verification IP packages intended to support a new crop of standard protocols.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , , , ,   |  Organizations:
November 12, 2015

DVCon Europe: Getting TLM to cope with proliferating ECUs and serial protocols

High powered alliance develops TLM standards to address growing automotive and IoT concerns.
October 19, 2015

Mentor targets next-gen Ethernet with emulation

Vendor adds verification support for 25G, 50G and 100G Ethernet through emulator-based virtualization.
Article  |  Topics: Blog - EDA, Embedded, - Verification  |  Tags: , , , , , , ,   |  Organizations: ,
March 26, 2015

Xmos brings programmable networking to Gigabit Ethernet

Xmos has launched a series of microcontrollers based on its timesliced multicore architecture that adds Gigabit Ethernet interfaces.
Article  |  Topics: Blog - Embedded  |  Tags: , , , ,   |  Organizations: ,
May 20, 2013

TVS expands VIP library

Test and Verification Solutions has expanded its library of verification IP to cover protocols in MIPI, memories, serial IO and communication.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , , , , ,   |  Organizations:
February 27, 2012

Synopsys verification IP launch has bite

Synopsys has rolled out its SystemVerilog-based verification IP portfolio for a bunch of interconnect standards – and built in support for all the three major verification methodologies.

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