August 18, 2021
A DVCon technical paper addresses potential reset domain crossing metastability issues due to UPF instrumentation.
June 20, 2019
ES Design West was created to reflect integration, even elision of tasks across the semiconductor supply chain. Here's how the program reflects the trend.
May 5, 2017
Can embedded projects that call for both custom hardware and software be agile? It's a question that a conference in early May organized by UK training company Feabhas sought to answer.
February 22, 2016
Verification specialist's DVCon activities are headlined by a panel on emulation and static verification.
June 8, 2015
Atrenta's SpyGlass line and others to be absorbed in Verification Continuum and Galaxy as part of EDA's latest major consolidation.
May 21, 2015
Meridian Physical CDC targets post-synthesis gate-level clock domain crossing issues, including unintended glitches and functional failures.
September 29, 2014
Synopsys is integrating its verification tools to make it easier to move between verification approaches for software centric SoCs
July 22, 2014
More than 20 new features and improvements are added to the static functional tool.
March 4, 2014
New tool technologies, Verdi integration and greater flow concurrency also contribute to a claimed 3X increase in productivity for Verification Compiler.