emulation

December 18, 2020

Virtual emulation delivers verification for the latest storage devices

Computational storage devices are posing a new raft of challenges that is being addressed using a powerful pre-silicon methodology.
December 4, 2020

Analog surges as cause of IC respins (Wilson Functional Verification 2020 – Part Three)

Study may point to new challenges in more bidirectional AMS implementations on SoC-class designs, though formal and emulation help keep respin count in check.
November 3, 2020

Showing ‘equivalence’ to seed digital twin adoption

A partnership between Siemens and VSI, a real-world autonomous vehicle research company, aims to refine and promote digital twin strategies.
Article  |  Topics: Digital Twin, Verification  |  Tags: , , , , , , ,   |  Organizations:
August 27, 2020

Cloud access to emulator helps AI processor start-up prove design, win funding

Small startup gets flexible cloud access to big iron to prove a novel processor architecture quickly.
Article  |  Topics: Blog - EDA, - Product  |  Tags: , ,   |  Organizations:
July 31, 2020

Open-RAN puts more focus on emulation in testing programs

Recent developments have made Open-RAN look more attractive as a way of implementing 5G systems. This is helping to drive a shift-left in verification and test.
Article  |  Topics: Blog - EDA, IP, PCB  |  Tags: , , , , , ,   |  Organizations:
March 19, 2020

Deploying pre- and post-silicon verification and test for 5G designs

A flexible and still evolving range of 5G standards requires methodologies that can handle massive test.
January 7, 2020

Siemens and Arm combine to extend digital twin further into SoC design

Partnership combines Siemens PAVE 360 digital twin with ARM IP, including dedicated automotive offerings, to speed and streamline design toward Level 5.
Article  |  Topics: Digital Twin, Blog - EDA, IP, PCB  |  Tags: , , , ,   |  Organizations: , ,
October 7, 2019

Master the design and verification of next gen transport: Part Four – emulation

Emulation is already playing a vital role in advanced automotive design within a digital twin environment.
October 2, 2019

Master the design and verification of next gen transport: Part Two – high-level synthesis

An object classification demonstrator shows how high-level synthesis (HLS) can speed the delivery and exploration of automotive design.
September 30, 2019

Master the design and verification of next gen transport: Part One – overview

What design solutions can best help deliver increasingly complex autonomous and ADAS systems?

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