coverage


April 3, 2019

DVCon China 2019 preview: OneSpin

The verification specialist will address the challenges posed by billion-gate SoCs and the integration of formal and simulation in its presentations.
Article  |  Topics: Blog - EDA, - Verification  |  Tags: ,   |  Organizations: ,
February 15, 2018

DVCon US 2018 preview: Oski Technology

The formal verification specialist will be discussing its own experiences and has partnered with users for presentations at DVCon US.
Article  |  Topics: Conferences, Blog - EDA, - Verification  |  Tags: ,   |  Organizations: ,
February 22, 2016

DVCon United States 2016 preview: Mentor Graphics

Mentor Graphics chairman and CEO Wally Rhines will deliver the DVCon keynote as the vendor sets a deep agenda for the conference.
June 6, 2015

Intelligent software testing conference coming up online – and in Bristol

Online conference discusses software testing for avionics and security, code coverage, agile methodologies, behaviour-driven development and more
Article  |  Topics: Blog - Embedded  |  Tags: , ,   |  Organizations:
May 31, 2015

Ten myths of formal verification debunked

Senior verification expert at Imagination Technologies debunks ten myths surrounding the use of formal techniques in SoC design and verification
March 4, 2014

Synopsys targets 5X performance gain with integrated verification suite

New tool technologies, Verdi integration and greater flow concurrency also contribute to a claimed 3X increase in productivity for Verification Compiler.
November 19, 2012

‘Process and metrics before tools for better verification’

Chip-design teams are running into problems with verification because they are focused too much on tools and not enough on processes, Mentor Graphics chief scientist Harry Foster explained today at the first of a series of Verification Futures seminars hosted by TVS in Europe this week.
Article  |  Topics: Blog - EDA  |  Tags: , , , ,   |  Organizations:
October 17, 2012

Mentor extends Questa with formal coverage checks

New features provide enhanced formal checking analysis, code coverage closure and extended clock domain crossing analysis.
May 29, 2012

DAC 2012: Accellera takes first step to a real coverage standard

UCIS 1.0 will provide a common format to analyze and compare data from different vendors' tools. Yup, it's a 'Biden' of a deal.
Article  |  Topics: Blog Topics, Conferences, Blog - EDA, - Standards, Verification  |  Tags: , , ,   |  Organizations:

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