Latest version of Verilog-AMS ready for release
The board of directors of Accellera Systems Initiative has approved the 2023 edition of the Verilog-AMS standard for release.
standards
Accellera updates portable stimulus standard
Accellera ’s board of directors has approved the version 2.1 of the Portable Test and Stimulus Standard.
Accellera forms CDC working group and takes security standard to IEEE
Accellera has formed a clock-domain crossing working group and has also passed its security-annotation standard to the IEEE.
Accellera attempts to standardize CDC data
Accellera is on the first stage of setting up a working group to create a standard for exchanging information on clock domain crossing checks.
Go inside proposals for common chiplet models
Chiplets will need models to guarantee heterogenous SiP implementation. A cross-industry working group describes its progress so far.
Portable stimulus moves to version 2.0
The Accellera board has approved version 2.0 of the Portable Test and Stimulus Standard.
Accellera publishes security standard draft
Accellera has published the version 1.0 draft of the proposed Security Annotation for Electronic Design Integration standard.
Accellera IP security group expects standard by year end
The chair of Accellera’s IP security assurance working group expects the draft standard for hardening hardware core to be out by the end of the year.
Deploying pre- and post-silicon verification and test for 5G designs
A flexible and still evolving range of 5G standards requires methodologies that can handle massive test.
Accellera moves to working-group stage for functional-safety standard
Accellera has set up a working group with the aim of developing interoperability standards for functional safety.