The verification IP is the first to become commercially available for the bus interface backed by companies such as AMD, Google, IBM, Micron and Xilinx.
AI, its system design implications and its impact on EDA tools themselves will be a key theme for ES Design West next month.
AMD used Calibre with optimisations implemented for cloud support to slash runtimes on high-end server processor designs.
DVCon USA is coming soon. Mentor's 2019 involvement includes a keynote from parent Siemens and a tutorial on managing your formal verification processes.
In a panel session at June's DAC, Synopsys customers talked about some of the ways they make verification more efficient and bring technologies such as formal, emulation, and simulation together.
Early-access customers talked about their experiences with the Synopsys Fusion-based flow in a panel session at the DAC.
GlobalFoundries intends to offer a 12nm FinFET process as a stepping stone from its 14nm process.
Design for test could look quite different in five years' time compared to the situation designers have today as chipmakers wrestle with the problems of yield control, safety, and aging.
Microsoft has launched an OEM version of the Windows Holographic platform it has developed for its own AR headset, the HoloLens.
Companies presenting at User2User Santa Clara on April 26 include AMD, Microsoft, nVidia, Oracle, Qualcomm, and Samsung.
View All Sponsors