simulation

December 5, 2023

Zero ASIC open sources system simulation/emulation platform

Start-up launches platform on path to the specification, emulation and simulation of large chiplet-based designs.
November 20, 2023

Creating the right simulation build flow

What are your options and what is one of the latest simulator features that helps streamline your build?
Article  |  Topics: Blog - EDA, - Verification  |  Tags: ,
October 6, 2023

Fast instruction simulator expands to Arm

MachineWare has expanded its portfolio of high-speed instruction-set simulators to the Arm Cortex-A and -M architectures.
Article  |  Topics: Blog - EDA, Embedded  |  Tags: , , , , ,   |  Organizations:
August 22, 2023

Accellera group formed to work on federated simulation

Accellera has formed a working group to look at the possibility of creating a standard for federated simulation.
June 28, 2022

Aachen spinout claims fastest RISC-V simulator

MachineWare claims it can reach 2GHz throughput with instruction-set simulator for RISC-V processors.
June 10, 2022

Cadence adds machine learning to electrical simulation

Cadence has used machine-learning techniques originally developed for its Cerebrus tool to build software that can speed up multiphysics analysis.
Article  |  Topics: Blog - EDA, Electrical Design  |  Tags: , , ,   |  Organizations:
May 24, 2022

Saber models aim for ADI power chips

Synopsys and Analog Devices have agreed to provide model libraries for the chipmaker's DC/DC ICs and power regulators that work with the Saber simulation tool.
Article  |  Topics: Blog - IP  |  Tags: , ,   |  Organizations: ,
March 13, 2022

Learn strategies for better measurement and test in simulation-based PCB design

A new white paper offers useful tips and techniques for PDN analysis and performance optimization in designs such as those using DDR4.
Article  |  Topics: Blog - PCB  |  Tags: , , , , ,   |  Organizations:
March 2, 2022

Synopsys talks AI in verification at DVCon

Synopsys R&D vice president Manish Pandey described the ways in which the tools supplier has harnessed machine learning so far to gain speedups and improvements in coverage.
Article  |  Topics: Blog - EDA  |  Tags: , , , ,   |  Organizations:
November 3, 2021

Python provides the link for speed checks at Sondrel

Sondrel has combined EDA tools with custom SystemC and Python code to develop a system that can help automate the detailed performance analysis of high-level architectures before RTL is generated.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , , , ,   |  Organizations: ,

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