Zero ASIC open sources system simulation/emulation platform
Start-up launches platform on path to the specification, emulation and simulation of large chiplet-based designs.
simulation
Creating the right simulation build flow
What are your options and what is one of the latest simulator features that helps streamline your build?
Fast instruction simulator expands to Arm
MachineWare has expanded its portfolio of high-speed instruction-set simulators to the Arm Cortex-A and -M architectures.
Accellera group formed to work on federated simulation
Accellera has formed a working group to look at the possibility of creating a standard for federated simulation.
Aachen spinout claims fastest RISC-V simulator
MachineWare claims it can reach 2GHz throughput with instruction-set simulator for RISC-V processors.
Cadence adds machine learning to electrical simulation
Cadence has used machine-learning techniques originally developed for its Cerebrus tool to build software that can speed up multiphysics analysis.
Saber models aim for ADI power chips
Synopsys and Analog Devices have agreed to provide model libraries for the chipmaker's DC/DC ICs and power regulators that work with the Saber simulation tool.
Learn strategies for better measurement and test in simulation-based PCB design
A new white paper offers useful tips and techniques for PDN analysis and performance optimization in designs such as those using DDR4.
Synopsys talks AI in verification at DVCon
Synopsys R&D vice president Manish Pandey described the ways in which the tools supplier has harnessed machine learning so far to gain speedups and improvements in coverage.
Python provides the link for speed checks at Sondrel
Sondrel has combined EDA tools with custom SystemC and Python code to develop a system that can help automate the detailed performance analysis of high-level architectures before RTL is generated.