December 5, 2023
Start-up launches platform on path to the specification, emulation and simulation of large chiplet-based designs.
November 20, 2023
What are your options and what is one of the latest simulator features that helps streamline your build?
October 6, 2023
MachineWare has expanded its portfolio of high-speed instruction-set simulators to the Arm Cortex-A and -M architectures.
August 22, 2023
Accellera has formed a working group to look at the possibility of creating a standard for federated simulation.
June 28, 2022
MachineWare claims it can reach 2GHz throughput with instruction-set simulator for RISC-V processors.
June 10, 2022
Cadence has used machine-learning techniques originally developed for its Cerebrus tool to build software that can speed up multiphysics analysis.
May 24, 2022
Synopsys and Analog Devices have agreed to provide model libraries for the chipmaker's DC/DC ICs and power regulators that work with the Saber simulation tool.
March 13, 2022
A new white paper offers useful tips and techniques for PDN analysis and performance optimization in designs such as those using DDR4.
March 2, 2022
Synopsys R&D vice president Manish Pandey described the ways in which the tools supplier has harnessed machine learning so far to gain speedups and improvements in coverage.
November 3, 2021
Sondrel has combined EDA tools with custom SystemC and Python code to develop a system that can help automate the detailed performance analysis of high-level architectures before RTL is generated.