Tech Design Forum Briefing


Briefing Authors

Paul Dempsey

Paul Dempsey Paul Dempsey has been a technology journalist for 20 years. His work has also appeared in EETimes, Red Herring and specialist journals published by the Financial Times.

Luke Collins

Luke Collins Luke Collins is a freelance technology journalist with 22 years’ experience. He is a former Editor-in-Chief of Electronics Times in the UK, and co-founded the IP9x series of conferences.

Chris Edwards

Chris Edwards Chris Edwards has spent two decades covering electronics and EDA. He is a former Editor-in-Chief of Electronic Engineering Times UK and electronics editor of the IET's Engineering & Technology.
December 11, 2019

Support for RISC-V expands at summit

This week’s RISC-V Summit in California has seen an expansion to the open-source portfolio being built around the architecture as well as increased support from software vendors such as Wind River.

December 10, 2019

Breker adds automated system integration test generation for RISC-V

App joins Portable Stimulus specialist’s Trek5 family to reduce manual test writing during verification on designs for the fast-growing RISC-V open-source processor.

December 4, 2019

Cadence to acquire AWR from National Instruments

Cadence Design Systems has agreed to buy the AWR RF-design company from its current owner National Instruments for approximately $160m.

December 3, 2019

Imagination splits GPU lanes for high-utilization acceleration

Imagination Technologies has launched a new generation of GPU IP aimed at multitasking compute acceleration.

November 27, 2019

Use digital threads to link software and hardware in automotive

A white paper from Mentor, a Siemens business, shows the growing need for vehicle makers and their supply chain partners to create better links between hardware and software elements.

November 19, 2019

2020 VLSI Symposia to look at the next 40 years

Having provided a forum for describing the progress of process technology and circuit design for four decades, the organizers of the 2020 Symposia on VLSI Technology & Circuits are asking presenters to look at the coming 40 years.

November 12, 2019

Mentor cuts scan time in package of test measures for automotive designs

Aimed at automotive designs, Mentor has developed a BIST technology that the company claims can speed up the process ten-fold by making more of each scan cycle.

November 12, 2019

Xilinx aims for software flow with Vitis

Xilinx has released the first version of its Vitis development environment as the company aims to capture a user base that is more used to software than hardware tools.

November 11, 2019

Mentor takes DFT planning to a higher level for hierarchical flows

Mentor has introduced a DFT-automation methodology that is designed to support the growing use of hierarchical strategies.

November 8, 2019

Accellera sets up to group to look at interoperability for safety analysis

Accellera to look at interoperability standard for failure analysis tools in safety engineering.

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