December 5, 2023
Start-up launches platform on path to the specification, emulation and simulation of large chiplet-based designs.
November 21, 2022
Aside from the keynotes and technical papers, the networking at an event like DVCon Europe provides a way to keep open-source EDA on the road.
July 7, 2022
The tool development specialist will demonstrate its broad portfolio at next week's Design Automation Conference in San Francisco.
March 4, 2022
A panel at DVCon argued too much of a focus on point tools coupled with challenges with interoperability and cross-industry cooperation is hindering the ability of SoC teams to design and verify complex products.
December 3, 2021
Tool development enabler Verific will demonstrate its parsers, including a combination with the INVIO API platform at DAC 2021 in San Francisco next week.
November 3, 2021
Sondrel has combined EDA tools with custom SystemC and Python code to develop a system that can help automate the detailed performance analysis of high-level architectures before RTL is generated.
October 28, 2020
Speakers at this year's DVCon Europe called on the hardware community to find inspiration in software-development trends.
February 26, 2020
Tool development specialist Verific will demonstrate its parsers and their integration with INVIO APIs.
February 21, 2019
Verific Design Automation , specialist in parsers for SystemVerilog, VHDL and UPF, will also demo its INVIO platform with high level Python and C++ APIs.
May 19, 2017
DAC's traditional training day is expanding into the field of machine learning this year in Austin.