Python


December 5, 2023

Zero ASIC open sources system simulation/emulation platform

Start-up launches platform on path to the specification, emulation and simulation of large chiplet-based designs.
November 21, 2022

DVCon Europe looks to network effects

Aside from the keynotes and technical papers, the networking at an event like DVCon Europe provides a way to keep open-source EDA on the road.
Article  |  Topics: Blog - EDA  |  Tags: , , , , , , ,   |  Organizations:
July 7, 2022

DAC 2022 preview: Verific Design Automation

The tool development specialist will demonstrate its broad portfolio at next week's Design Automation Conference in San Francisco.
Article  |  Topics: Blog - EDA, - Tool development  |  Tags: , , , ,   |  Organizations: ,
March 4, 2022

Verification engineers look to better skills to beat schedules

A panel at DVCon argued too much of a focus on point tools coupled with challenges with interoperability and cross-industry cooperation is hindering the ability of SoC teams to design and verify complex products.
Article  |  Topics: Blog - EDA  |  Tags: , , , , , ,   |  Organizations: , , ,
December 3, 2021

DAC 2021 preview: Verific

Tool development enabler Verific will demonstrate its parsers, including a combination with the INVIO API platform at DAC 2021 in San Francisco next week.
Article  |  Topics: Conferences, Tool development, Verification  |  Tags: , , , , , , ,   |  Organizations: ,
November 3, 2021

Python provides the link for speed checks at Sondrel

Sondrel has combined EDA tools with custom SystemC and Python code to develop a system that can help automate the detailed performance analysis of high-level architectures before RTL is generated.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , , , ,   |  Organizations: ,
October 28, 2020

DVCon keynoters look to software for verification optimization ideas

Speakers at this year's DVCon Europe called on the hardware community to find inspiration in software-development trends.
February 26, 2020

DVCon US 2020 preview: Verific

Tool development specialist Verific will demonstrate its parsers and their integration with INVIO APIs.
Article  |  Topics: Blog Topics, Conferences, Blog - EDA, - Tool development, Verification  |  Tags: , , , , ,   |  Organizations: ,
February 21, 2019

DVCon USA 2019 preview: Verific Design Automation

Verific Design Automation , specialist in parsers for SystemVerilog, VHDL and UPF, will also demo its INVIO platform with high level Python and C++ APIs.
Article  |  Topics: Blog - EDA, - Tool development  |  Tags: , , , , , ,   |  Organizations: ,
May 19, 2017

DAC to train on machine learning

DAC's traditional training day is expanding into the field of machine learning this year in Austin.
Article  |  Topics: Blog - EDA, Embedded  |  Tags: , , , ,   |  Organizations:

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