Keynotes at this year’s IRPS conference focused on the way in which scaling is forcing changes to the way that the reliability aspects of semiconductors are examined.
Automated resistance checks mitigate the increasing complexity involved when analyzing voltage drop, ESD and noise, particularly for analog-heavy designs.
A new paper describes an alternative to increasingly inefficient manual ESD verification that reduces risks of respins and missed delivery deadlines.
Graphcore has licensed IP from Belgium-based Sofics to protect its Colossus GC2 processors from ESD.
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