March 27, 2013

Intel and ST stake claims to foundry low power designs

With both now more dependent on foundry business for their finFET (trigate) and FDSOI offerings, DATE was a chance to push their innovations in low power.
March 22, 2013

DATE: ARM proposes ‘unit of compute’ as basis for energy-efficient systems

ARM CPU chief proposes 'unit of compute' as building block for energy-efficient computation systems
Article  |  Topics: Conferences, Blog - Embedded  |  Tags: , , , , , , , , ,   |  Organizations:
March 20, 2013

DATE: Double patterning and finFETs force flexibility on tools

EDA companies are having to plan for the different ways in which double patterning and finFETs could move into fabs, Antun Domic of Synopsys explains.
Article  |  Topics: Blog - EDA  |  Tags: , , , , ,   |  Organizations:
March 20, 2013

DATE: Early shift to finFET processes challenges IP development strategies

An early shift to finFET processes is making developing IP libraries more challenging.
Article  |  Topics: Conferences, Blog - EDA, IP  |  Tags: , , , , , ,   |  Organizations:
February 26, 2013

Intel foundry to make Altera FPGAs

Intel's announcement that it will make FPGAs for Altera in an upcoming 14nm finFET process will reshape the programmable logic, and foundry, businesses.
Article  |  Topics: Blog Topics, General  |  Tags: , ,   |  Organizations: ,
February 5, 2013

GlobalFoundries and Samsung talk finFET progress at CPTF

GlobalFoundries and Samsung described how they are readying finFETs for production at CPTF 2013 and how the 28nm processes will have a long shelf life.
Article  |  Topics: Blog - EDA  |  Tags: , , ,   |  Organizations: , ,
January 23, 2013

The silicon industry’s crunch time

Future Horizon’s forecast meeting for the first half of 2013 made it clear how the electronics sector and the semiconductor industry in particular is facing big problems.
Article  |  Topics: Blog - EDA  |  Tags: , ,   |  Organizations: , ,
December 21, 2012

Samsung lines up tool providers for finFET tapeouts

14nm finFET test-chip designs are moving through Samsung's fab as ARM, Cadence Design Systems and Synopsys continue to check their flows on the new process.
Article  |  Topics: Blog - EDA  |  Tags: , , ,   |  Organizations: , , ,
December 11, 2012

FD-SOI vs finFETs mulled during IEDM

Can planar devices on fully depleted SOI resist the relentless rise of finFETs as the next device architecture of choice for the semiconductor industry? An evening panel at IEDM explored the trade-offs
December 11, 2012

Semiconductor roadmap gets fuzzier at IEDM

Semiconductor process options outlined at IEDM by Luc van den Hove of imec as industry faces hard choices and rising costs


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