May 12, 2017
Among the papers at this year's VLSI Symposia in Hawaii in June, Samsung will describe a 7nm CMOS process that uses EUV lithography to tighten up device features on minimum-pitch interconnects.
December 12, 2016
What will 3D integration look like? IEDM 2016 explored some of the options ranging from IoT sensors to advanced logic.
October 24, 2016
At the 62nd annual IEDM taking place in early December two of the leading groups in process development will take the wraps off their 7nm finFET technologies.
October 10, 2016
STMicroelectronics, Samsung, GSI Technology and Synopsys talk about the challenges of doing AMS design on finFET processes.
June 20, 2016
DTCO work by GlobalFoundries and Qualcomm reported at VLSI Symposia shows the need to minimize fin counts in future finFET processes.
May 18, 2016
ARM says it has received test chips designed to check how well an SoC built around a 64bit multicore Cortex v8-A processor complex would work TSMC's upcoming 10nm FinFET process technology.
April 7, 2016
But project lead Chenming Hu, 'finFET's father', has also highlighted important changes in the funding landscape for university research.
March 30, 2016
Synopsys is updating its custom design tools to make working with finFET based processes easier.
August 6, 2015
Flow exploration helps designers establish best approach to advanced network processor implementation on Samsung finFET process
July 30, 2015
Collaboration between ARM, TSMC and Synopsys reveals challenges of 10nm finFET design flows.