By analyzing topology during the schematic design phase, you can detect latch-up issues before post-layout ERCs and avoid late stage revisions.
The new Calibre Reconnaissance feature within Mentor's physical verification suite aims to maximize compute resources and deliver manageable reports.
A new whitepaper describes some of the techniques you can use to get the most out of cloud-based DRC with Calibre.
Mentor takes the wraps off new machine learning fueled features in its HLS and physical design families ahead of DAC 2019.
Qualcomm has described its use of Calibre RealTime Digital to enhance its P&R flow.
Mentor will be present throughout the DAC program but with a particular focus on machine learning, artificial intelligence and automotive challenges.
Early users of the new P&R integrated physical verification tool say time-to-sign-off was cut by 40% and above.
Innovation and advances in EUV and OPC lead Mentor's offerings at SPIE in San Jose later this month.
The Mentor chief discusses ESL-based low power, emulation, 32nm to 20nm and using tools in the cloud.
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