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January 28, 2020
Earlier latch-up prevention with topology-based analysis
By analyzing topology during the schematic design phase, you can detect latch-up issues before post-layout ERCs and avoid late stage revisions.
Article | Topics:
DFM
,
Blog - EDA
,
- Verification
| Tags:
calibre
,
electrical rule check
,
latchup
,
physical verification
,
reliability analysis
,
schematic
,
SCR
,
thyristor
,
topology
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