Get a comprehensive overview of ‘Shift Left’ for physical verification

By TDF Editor |  No Comments  |  Posted: March 29, 2024
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The ‘shift left’ concept covers an increasing number of elements within the design flow. For physical verification, in particular, there is a need to start tasks earlier and integrate them within the design creation process that takes place during place-and-route.

Achieving this removes iterations where verification tools are applied after a P&R run, avoids the ‘noise’ generated where there are incompatibilities in the results between the P&R data and that produced during verification, and mitigates the problem of bugs emerging late in the overall design flow.

However, a wide range of technologies are needed to do this. A new technical paper by David Abercrombie of Siemens Digital Industries Software provides a comprehensive overview of this part of the shift left drive by describing the features enabling it within the Calibre physical verification environment.

Abercrombie describes what processes can now be moved into the P&R tool cockpit, highlighting six specific sets of advantages:

  1. Signoff-quality verification in design implementation.
  2. Early design stage DRC verification.
  3. Early design stage LVS verification.
  4. Early design stage error debug.
  5. Early design stage design optimization.
  6. Verification innovation.

Abercrombie’s paper is thus significant in bringing together all the features that have been gradually added to Calibre as its shift left capabilities have grown over the last few years. It is a good time to take stock. Figure 1 shows the various parts of Calibre Shift Left.

Calibre Shift-Left block/chip integration workflow

Figure 1. Calibre Shift-Left block/chip integration workflow (Siemens EDA – click to enlarge)

“For block/chip designers, the Calibre Shift Left solutions enable new workflow options, reduced runtimes, simplified and faster debug, and new verification and design optimization options. These innovative solutions combine to provide significant efficiency and productivity gains in TAT to design closure, as well as improved design reliability and manufacturability,” Abercrombie observes.

“IP designers and 3DIC designers can also take advantage of Calibre Shift Left solutions for their unique verification challenges.”

Navigating design challenges: block/chip design-stage verification‘ is available for download here.

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