By analyzing topology during the schematic design phase, you can detect latch-up issues before post-layout ERCs and avoid late stage revisions.
Sonics has add static performance analysis to its SonicsStudio tool and timeout detection to its SonicsGN network intended to prevent SoCs locking up.
Will help industry giants develop more reliable power electronics systems for applications including transport and power generation.
New MicReD power tester identifies failure causes without the need for post-test lab analysis
In 2013, the Design Automation and Test in Europe (DATE) conference returns to Grenoble, France and with focus days on the Internet of Things and the cloud.
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