shift left


October 15, 2020

DVCon Europe: using all the tools at your disposal

Among the papers that will be presented at the end of October, this year's DVCon Europe will demonstrate the benefits of taking good ideas from wherever you can in the pursuit of more effective verification flows.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , , , ,   |  Organizations: , , ,
July 31, 2020

Open-RAN puts more focus on emulation in testing programs

Recent developments have made Open-RAN look more attractive as a way of implementing 5G systems. This is helping to drive a shift-left in verification and test.
Article  |  Topics: Blog - EDA, IP, PCB  |  Tags: , , , , , ,   |  Organizations:
July 20, 2020

Mentor tunes LVS for early SoC integration

Mentor has released a tool that attempts to deal with the problems encountered in the use of physical circuit verification in the early stages of SoC integration.
Article  |  Topics: Blog - EDA  |  Tags: , , , ,   |  Organizations:
April 26, 2019

The evolution of the digital twin

A digital twin is now more than just a virtual copy of a product. For Siemens, it is a multilayered concept powering a 'boundary-free innovation platform'.
Article  |  Topics: Commentary, Conferences, Blog - EDA, PCB  |  Tags: , , , ,   |  Organizations: , ,
November 14, 2018

Case study: Achieving earlier signoff convergence and a ‘shift left’ for P&R at Qualcomm

Qualcomm has described its use of Calibre RealTime Digital to enhance its P&R flow.
Article  |  Topics: Blog - EDA, - GDSII, Verification  |  Tags: , , , , , , ,   |  Organizations: ,

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