From iterative to in-design DRC and debug for place and route
Learn how Calibre RealTime Digital allows you to identify, explore and fix DRC violations as you go.
design rule check
How MaxLinear cut physical verification time with in-design DRC
A case study describes how the RF and AMS specialist achieved efficiencies on a complex server DSP SoC project by running as-you-go DRC during place and route.
On-demand DRC within P&R cuts closure time in half for MaxLinear
Case study describes how RF/AMS specialist used Calibre RealTime Digital within its flow for a high-end DSP SoC.
How to achieve faster, more relevant early-stage DRC with Recon
The new Calibre Reconnaissance feature within Mentor's physical verification suite aims to maximize compute resources and deliver manageable reports.
OpenPDK accelerates design kit production at ST
STMicroelectronics is using the OpenPDK standard from Si2 to speed up the production and delivery of process design kits (PDKs) and asks for wider adoption by foundries.
Mentor updates HyperLynx for faster boards, more rules checking
Mentor's HyperLynx gets speed and accuracy enhancements, as well as more embedded help, to speed up fast board design
DAC 2012: Energetic Si2 finds time to look back
But as it celebrates a decade of OpenAccess, the standards body also looks toward the future in PDKs, advanced DFM and 3D.
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