HLS

September 5, 2022

Cybersecurity must be built in not bolted on

Learn how one of the leading tool vendors addresses the security of its products and customer data through a ground-up cybersecurity strategy.
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November 23, 2021

DAC 2021 Preview: Siemens EDA

DAC 2021 is looming and here is our first round up of a major EDA player's plans for the physical event in San Francisco.
April 23, 2020

Balancing PPA as machine learning moves to the edge

High-level synthesis is playing another important role in the matching of AI algorithms to necessarily application-specific designs.
February 28, 2020

Learn how Renesas uses SLEC to enhance its verification flows

A new technical article discusses Renesas' addition of SLEC to its SystemC and RTL flows and the improvements it achieved in time and coverage..
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February 24, 2020

DVCon US 2020 preview: Mentor

Mentor will have a very broad presence at DVCon across technologies such as HLS, formal verification, simulation and emulation.
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October 4, 2019

Master the design and verification of next gen transport: Part Three – functional safety

The third part of this series takes the original CNN demonstrator through a full ISO 26262 type functional safety workflow
October 2, 2019

Master the design and verification of next gen transport: Part Two – high-level synthesis

An object classification demonstrator shows how high-level synthesis (HLS) can speed the delivery and exploration of automotive design.
September 3, 2019
Joe Sawicki, EVP for IC EDA, Mentor. 'AI inside' analysis

EDA with ‘AI inside’ – Mentor’s Joe Sawicki offers an insider’s view

Mentor has a host of tools - some public, some not - that leverage AI and ML. EVP Joe Sawicki has been describing the strategy behind their development.
August 23, 2019

Making the case for HLS in autonomous drive

The automotive market faces challenges that make it a prime candidate for the greater use of high-level synthesis on designs with AI and ML content.
July 11, 2019

C++ signoff made real

Konica Minolta describes how it has constructed a C++ signoff flow that mitigates code ambiguity, manual analysis and other inefficiencies.
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