Silicon Photonics verification case study from UC-Davis and Texas A&M

By TDF Staff |  No Comments  |  Posted: January 25, 2022
Topics/Categories: Verification  |  Tags: , ,  | Organizations: , ,

Silicon photonics is poised to become a go-to option for datacenters and high-performance computing because of the very high speeds and bandwidth it offers. But, like many emerging technologies, poses challenges for integration and verification.

In a case study, a joint team from UC-Davis and Texas A&M University describes how it undertook 3D LVS verification using a methodology based around the Xpedition Substrate (xSI) and Calibre 3DSTACK software from Siemens EDA.

The project was sponsored by the US Department of Energy with the overall goal of reducing the energy dissipated between compute nodes in the electrical and optical domains.

The team worked toward this by bringing together a low-power optical transceiver in a 12nm FinFET GlobalFoundries technology from Texas A&M and a SiPh IC (PIC) with micro-ring modulators and filters that allow for WDM communication from UC-Davis.

The two are integrated in a 3D stack that places the CMOS transceiver die on top of the silicon PIC (Figure 1).

Figure 1: CMOS transceiver directly mounted to an active photonics IC that is wire bonded to an organic interposer substrate

Figure 1: CMOS transceiver directly mounted to an active photonics IC that is wire bonded to an organic interposer substrate (UC-Davis/Texas A&M)

“The CMOS die is attached utilizing direct bond interconnects and copper pillars. The 3D die-stack is then placed on an organic laminate-based interposer for transitioning the electrical signals to the system PCB,” the team explains in the paper.

They opted for the xSI-3DSTACK combination to automate 3D LVS checking methodology because it alone could handle the thousands of system pad counts that they believe current and future silicon photonics designs will entail.

The paper describes how the tools were used within a cooperative UC-Davis/Texas A&M methodology, reviews the results and offers recommendation.

Most importantly, the results included the capture of what would have been a massive error leading the PIC layout to mistakenly “combine the two power supplies for the DC biasing of the optical transmitter output”.

“The error would have been devastating for the operation of the optical TX output due to an improper bias point at the ring modulator’s junction,” the team writes.

Taking Chips to Another Dimension: 3D-Integrated Silicon Photonics Transceiver Verification’ by Po-Hsuan Chang, Dedeepya Annabattuni, and Samuel Palermo of Texas A&M and Anirban Samanta and S. J. Ben Yoo of UC-Davis is available for immediate download.

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