Design to Silicon

October 10, 2016

Speeding up AMS design in the age of finFETs

STMicroelectronics, Samsung, GSI Technology and Synopsys talk about the challenges of doing AMS design on finFET processes.
Article  |  Tags: , , ,   |  Organizations: ,
August 27, 2016

Creating a reference design flow for 10nm processes: video

Synopsys video details challenges of 10nm design and its collaboration with Samsung Semiconductor to build a full flow to address them.
Article  |  Tags: , ,   |  Organizations: ,
May 25, 2016

DAC 2016 preview: Mentor Graphics

An overview of the vendor's busy DAC program from panels to technical sessions to a one-to-one with Wally Rhines.
Article  |  Tags: , , , , ,   |  Organizations:
April 13, 2016

User2User preview: Silicon Valley edition rolls out this month

Companies presenting at User2User Santa Clara on April 26 include AMD, Microsoft, nVidia, Oracle, Qualcomm, and Samsung.
April 7, 2016

SNUG 2016: Intel, TSMC, GloFo back post-finFET research at UC Berkeley

But project lead Chenming Hu, 'finFET's father', has also highlighted important changes in the funding landscape for university research.
February 11, 2016

SPIE Advanced Lithography Preview: Mentor Graphics

The Calibre vendor will have a strong technical presence at the leading lithography conference taking place in late February in San Jose.
December 7, 2015

Asymmetric variability issues could impact 7nm processes

Simulation shows 7nm process will need tighter variability control than expected, and possibly accommodation for asymmetric variability
Article  |  Tags: , , ,   |  Organizations: , ,
October 6, 2015

Samsung taps Mentor tools for higher yielding close-loop DFM

Samsung bases PRISM and FLARE defect analysis and optimization on Mentor Graphics' Calibre and Tessent. Yields rise. Ramps shorten.
Article  |  Tags: , , , , ,   |  Organizations: ,
August 6, 2015

Flow exploration key to finFET network processor implementation

Flow exploration helps designers establish best approach to advanced network processor implementation on Samsung finFET process
Article  |  Tags: , , ,   |  Organizations: , ,
July 30, 2015

10nm flow reveals complexity of finFET design process

Collaboration between ARM, TSMC and Synopsys reveals challenges of 10nm finFET design flows.
Article  |  Tags: , , , , , ,   |  Organizations: , ,

PLATINUM SPONSORS

Synopsys Cadence Design Systems Mentor - A Siemens Business
View All Sponsors