Energy harvesting, mechanical reprogrammable logic, and genetic algorithms were among the finalists for the MEMS design competition.
Electrical analysis facility does RC extraction on virtual fab models, accelerating the availability of early PDKs for new processes
The DATE 2016 conference saw the launch of a competition to encourage novel designs using MEMS technology.
Directed self assembly techniques may offer similar benefits to EUV lithography, especially for DRAM makers, says SPIE conference paper
Simulation shows 7nm process will need tighter variability control than expected, and possibly accommodation for asymmetric variability
Process development alliance will enable Imec to experiment on 10 and 7nm processes in the computer before moving to the fab
Fabless designers and IP providers need process simulation tools to understand how process variability could affect their designs.
How to save money in process development by moving experiments out of the fab and into the computer.
finFETs are vital to the next generation of CMOS processes from Intel, TSMC and others. How will process issues including bulk vs SOI substrates, density limitations, thickness control, and planar device integration affect their practical implementation?
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