July 8, 2019
Coventor has updated its SEMulator virtual-fab tool and added the ability to tune process windows based on simulation results.
August 16, 2018
Collaboration on DTCO offers IBM a better way to evaluate combinations of transistor architectures, materials and other process technology innovations using design metrics, before real wafers become available for physical experimentation.
April 6, 2017
Solido aims to bring the types of machine-learning techniques the company has used for its physical-analysis tools to a wider range of EDA tools through the launch of its ML Labs initiative.
February 23, 2016
Directed self assembly techniques may offer similar benefits to EUV lithography, especially for DRAM makers, says SPIE conference paper
December 7, 2015
Simulation shows 7nm process will need tighter variability control than expected, and possibly accommodation for asymmetric variability