Xilinx

March 26, 2021

Siemens brings emulation and prototyping together in hardware-assisted verification

Siemens Digital Industries Software has launched the latest generation of its Veloce hardware-assisted verification systems with a product line that encompasses silicon virtual platform, hardware emulation, and prototyping support.
July 1, 2020

Sigasi creates SDK for custom editors

Sigasi has launched a software kit to provide inhouse tools builders and EDA vendors with a way to build in code-editing features.
Article  |  Topics: Blog - EDA  |  Tags: , , , , , ,   |  Organizations: ,
November 12, 2019

Xilinx aims for software flow with Vitis

Xilinx has released the first version of its Vitis development environment as the company aims to capture a user base that is more used to software than hardware tools.
Article  |  Topics: Blog - Embedded  |  Tags: , , , ,   |  Organizations:
July 2, 2019

SmartDV adds verification IP for OpenCAPI data-center standard

The verification IP is the first to become commercially available for the bus interface backed by companies such as AMD, Google, IBM, Micron and Xilinx.
June 27, 2019

Building an ecosystem around HLS for AI and ML designs

Mentor's AI Accelerator Ecosystem adds reference designs, libraries and other forms of support around its Catapult HLS platform.
May 28, 2019

Cadence expands Protium for rack-based prototyping

Cadence has developed a version of its Protium prototyping engine that supports larger designs and which is intended to go into data-center racks.
April 22, 2019

Machine learning and chiplets headline VLSI Symposia

Large-scale MCMs and novel device architectures bookend the papers on machine learning at VLSI Symposia in an event that will also cover chiplet integration and other topics.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , , , ,   |  Organizations: , ,
February 21, 2019

Mentor Embedded Linux launch targets enterprise-class gap

The suite is based on Debian and aims to offer the performance and configurability needed for robust and scaleable enterprise-class applications in medical, industrial, aerospace and defense markets.
May 11, 2018

Mixed-signal circuits push scaled CMOS at VLSI

The circuits sessions at mid-June's VLSI Symposia in Honolulu feature a number of papers that improve the performance of scaled mixed-signal processes.
Article  |  Topics: Blog - EDA  |  Tags: , , , , ,   |  Organizations: , ,
March 19, 2018

Xilinx plans reconfigurable compute for 7nm FPGA generation

Xilinx plans to make reconfigurable computing the focus of its upcoming generation of FPGAs, which will be made on a 7nm finFET process at TSMC and expected to start sampling next year.
Article  |  Topics: Blog - Embedded, IP  |  Tags: , , , ,   |  Organizations:

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