bus interface

July 2, 2019

SmartDV adds verification IP for OpenCAPI data-center standard

The verification IP is the first to become commercially available for the bus interface backed by companies such as AMD, Google, IBM, Micron and Xilinx.

Article | Topics: Blog - EDA, - Verification | Tags: bus interface, bus protocol, data center, high performance computing, memory, server, verification IP | Organizations: AMD, ES Design West, Google, IBM, Micron Technology, OpenCAPI, SmartDV, Xilinx

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