China Focus 2: The Design Dilemma
Do China's ambitions as a world-class innovator face fundamental challenges as a result of the sector's existing economic infrastructure?
Author Archives: Paul Dempsey
How to optimize your testbench-to-DUT connections
Testbench connections often depend on the virtual interface feature of SystemVerilog but other options - like abstract classes - can help.
China Focus 1: Wally Rhines maps startup and design growth
In the first of a weekly series on China's evolving design sector, we look at how the Mentor President and CEO identifies some of the key drivers.
Creating a $4B market for silicon photonics
It's been a long time coming, but silicon photonics is now entering commercial design for networking and grabbing attention in autonomous driving and sensors.
Why Mentor backs the PSS-DSL input format for the Portable Stimulus Specification
With PSS moving toward greater adoption, the Siemens vendor seems PSS-DSL as a winner in terms of conciseness and ease-of-adoption.
Xpedition updated for schematic verification and DFT
Mentor's flagship PCB suite is aiming to offer another 'shift left' in verification as respins rise.
Case study: Achieving earlier signoff convergence and a ‘shift left’ for P&R at Qualcomm
Qualcomm has described its use of Calibre RealTime Digital to enhance its P&R flow.
Symphony raises crescendo for AMS simulation
Mentor's updated AMS platform claims performance boost by obviating 'legacy' technology.
FPGA playing verification catch-up as bugs escape
The latest Mentor-commissioned Wilson Research Group study on ASIC and FPGA verification highlights technique adoption and maturity.
Mentor automates silicon photonics layout
The LightSuite Compiler produces designs based on Python descriptions and certifies them DRC-clean through hooks into the market-leading Calibre DFM suite.