assertions


May 8, 2019

Formal engines learn from experience

Cadence and OneSpin are applying various forms of machine learning to their tools to automate formal verification.
Article  |  Topics: Blog - EDA  |  Tags: , ,   |  Organizations: ,
October 17, 2018

FPGA playing verification catch-up as bugs escape

The latest Mentor-commissioned Wilson Research Group study on ASIC and FPGA verification highlights technique adoption and maturity.
Article  |  Topics: Verification  |  Tags: , , , , , ,   |  Organizations: ,
May 31, 2015

Ten myths of formal verification debunked

Senior verification expert at Imagination Technologies debunks ten myths surrounding the use of formal techniques in SoC design and verification
May 11, 2015

Formal verification conference offers ARM, Broadcom, Imagination insights, online access

Conference addresses formal verification techniques at levels to suit beginners through to experts
October 17, 2012

Mentor extends Questa with formal coverage checks

New features provide enhanced formal checking analysis, code coverage closure and extended clock domain crossing analysis.

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