Identifying AI opportunities in PCB design
The key to exploiting AI is being clear about where its family of technologies can help to improve and democratize design.
Author Archives: Paul Dempsey
Siemens automates test to handle multi-die 2.5D, 3D and 5.5D architectures
Tessent Multi-die extends the capabilities of the DFT suite in line with new standards intended to enable widespread adoption of interposer and stacked die strategies.
Overcome reset domain crossing challenges when using UPF
A DVCon technical paper addresses potential reset domain crossing metastability issues due to UPF instrumentation.
Understand how DO-254 defines verification for avionics
The avionics design assurance guidance has its own flavor of verification which needs to be understood alongside its definition of validation.
Siemens extends Solido’s reach into IP validation with Fractal
Latest acquisition adds technologies to mitigate rising verification time and cost for third-party IP.
Hardware verification puts software first
Siemens's expansion of the Veloce hardware-assisted verification platform delivers on one of its current mission statements.
Siemens buys formal start-up OneSpin
The formal apps start-up has built strong positions in automotive and RISC-V and will strengthen Siemens in competition with Cadence.
Embeddedworld 2021 Digital preview: Siemens Embedded
Following its rebranding from Mentor, the division will have a strong presence in the main program and across virtual roundtables at next week's online event.
Analog surges as cause of IC respins (Wilson Functional Verification 2020 – Part Three)
Study may point to new challenges in more bidirectional AMS implementations on SoC-class designs, though formal and emulation help keep respin count in check.
Less than one-in-five FPGA projects avoid bug escapes (Wilson Functional Verification 2020 – Part Two)
Benchmark study detects correlation between maturity of verification processes and the quality of designs when they reach production.