Author Archives: Paul Dempsey

About Paul Dempsey

Paul Dempsey is editor-in-chief of Tech Design Forum and has been a technology journalist for 20 years. His work has also appeared in EETimes, Red Herring and specialist journals published by the Financial Times.
August 18, 2021

Overcome reset domain crossing challenges when using UPF

A DVCon technical paper addresses potential reset domain crossing metastability issues due to UPF instrumentation.
May 19, 2021

Understand how DO-254 defines verification for avionics

The avionics design assurance guidance has its own flavor of verification which needs to be understood alongside its definition of validation.
May 13, 2021

Siemens extends Solido’s reach into IP validation with Fractal

Latest acquisition adds technologies to mitigate rising verification time and cost for third-party IP.
April 19, 2021

Hardware verification puts software first

Siemens's expansion of the Veloce hardware-assisted verification platform delivers on one of its current mission statements.
Article  |  Topics: Blog Topics  |  Tags: , , , ,   |  Organizations:
April 16, 2021

Siemens buys formal start-up OneSpin

The formal apps start-up has built strong positions in automotive and RISC-V and will strengthen Siemens in competition with Cadence.
February 26, 2021

Embeddedworld 2021 Digital preview: Siemens Embedded

Following its rebranding from Mentor, the division will have a strong presence in the main program and across virtual roundtables at next week's online event.
Article  |  Topics: Conferences, Blog - Embedded  |  Tags:   |  Organizations: ,
December 4, 2020

Analog surges as cause of IC respins (Wilson Functional Verification 2020 – Part Three)

Study may point to new challenges in more bidirectional AMS implementations on SoC-class designs, though formal and emulation help keep respin count in check.
December 1, 2020

Less than one-in-five FPGA projects avoid bug escapes (Wilson Functional Verification 2020 – Part Two)

Benchmark study detects correlation between maturity of verification processes and the quality of designs when they reach production.
November 27, 2020

RISC-V in nearly a quarter of designs (Wilson Functional Verification 2020 – Part One)

Use of the open-source RISC-V processor was tracked for the first time by the biennial study, finding notably high take-up.
November 3, 2020

Showing ‘equivalence’ to seed digital twin adoption

A partnership between Siemens and VSI, a real-world autonomous vehicle research company, aims to refine and promote digital twin strategies.
Article  |  Topics: Digital Twin, Verification  |  Tags: , , , , , , ,   |  Organizations: