Start-up launches platform on path to the specification, emulation and simulation of large chiplet-based designs.
Author Archives: Paul Dempsey
Solido discusses how it has leveraged AI for SPICE level efficiency and the benchmarks it has used.
Tessent RTL Pro allows wrapper cells and x-bounding logic to be inserted earlier in designs.
Just how much of the flow has already has 'shift left' benefit and what is fueling further progress.
The Joules RTL Design Studio aims to make coding more aware of aware of physical issues before and after hand-off for implementation.
Calibre Design Enhancer moves physical verification checks and automated DRC-clean via and cell insertion into P&R
A comprehensive review of ML's potential and its current use identifies challenges ahead.
As first silicon success declines, new software aims to provide a more holistic view of coverage data from multiple sources.
The key to exploiting AI is being clear about where its family of technologies can help to improve and democratize design.
Tessent Multi-die extends the capabilities of the DFT suite in line with new standards intended to enable widespread adoption of interposer and stacked die strategies.