Mentor automates silicon photonics layout

By Paul Dempsey |  No Comments  |  Posted: September 12, 2018
Topics/Categories: Blog Topics, Design to Silicon, HPC, Product  |  Tags: , , , , , ,  | Organizations: , ,

Mentor, a Siemens business, today (September 12) launched the first automated layout tool for silicon photonics designs. LightSuite Photonic Compiler takes designs described in Python and automatically generates a design that, in conjunction with a license for the Calibre RealTime Custom tool, produces a layout that has undergone DFM checks.

As the use of Python shows – as well as that of standards such as OpenAccess and iPDK – the LightSuite tool has been designed to address an emerging market where many non-IC designers work alongside those more familiar with traditional EDA tools.

Mentor’s history in silicon photonics dates back to the beginning of this decade, and the company already services many of the market’s players with manual tools from its Tanner subsidiary.

The decision to roll-out an automated, Calibre-integrated solution reflects the growing use of silicon photonics (and related gallium arsenide and indium phosphide-based technologies) across markets such as sensors, networking (intra- and inter-blade), LIDAR for advanced vehicles, and high performance computing.

As one of a range of ‘More-than-Moore’ options being adopted in engineering, silicon photonics alone will bypass $2B in value in 2021, according to LightCounting Market Research. However, when discrete and integrated GaAs and InP sales are added, that figure rises to $11B – a more than fivefold across-the-board increase since 2010.

Silicon photonics grows the ecosystem

The Calibre aspect to LightSuite shows that Mentor has worked on its new product with foundries capable of providing DFM data. These range from France’s CEA-Leti research powerhouse to Israel-based Tower Jazz.

Foundry and expert cooperation has been fundamental to developing a tool that can claim to offer DRC-clean results here because silicon photonics incorporates curvilinear layouts as opposed to the simpler Manhattan grids associated with ICs. Traditional DRC decks will flag hundreds of ‘errors’ that are not necessarily such – or expose process limitations – when confronted with these curves, required to deliver necessary waveguides.

Mentor has beta-run and refined LightSuite with leading silicon photonics design pioneers, such as Hewlett-Packard Enterprise. HP research scientist Ashkan Seyedi said: “Photonic chips promise amazing performance, but designing circuits today is just too difficult and requires specialized knowledge. LightSuite circumvents those challenges and enables scalability.”

More to the point, customer runs with the new tool have delivered layouts for a 400 component in as little as nine minutes, compared with two weeks to achieve the same on a manual flow. Beyond simplifying design flows and speeding time-to-market, Mentor sees this also giving designers more bandwidth to look at multiple layout options for what is still an emerging technology.

LightSuite is available from October 1, 2018. Mentor will demonstrate the tool at the European Conference on Optical Communication (ECOC 2018) in Rome, Italy, September 23027.

Comments are closed.


Synopsys Cadence Design Systems Siemens EDA
View All Sponsors