DVCon Europe adds research track
DVCon Europe is expanding coverage into research on design verification for its 10th conference later this year.
research
IEDM switches to virtual format for 2020
The organizers of the 66th annual IEDM have decided to hold the December conference virtually.
IEDM plans for San Francisco in December
The IEEE plans to stage the 66th International Electron Device Meeting as a physical event in mid-December.
China Focus 2: The Design Dilemma
Do China's ambitions as a world-class innovator face fundamental challenges as a result of the sector's existing economic infrastructure?
FPGA playing verification catch-up as bugs escape
The latest Mentor-commissioned Wilson Research Group study on ASIC and FPGA verification highlights technique adoption and maturity.