Author Archives: Chris Edwards

About Chris Edwards

Chris Edwards has spent a long time covering electronics and EDA. He is a former Editor-in-Chief of Electronic Engineering Times UK and electronics editor of the IET's Engineering & Technology. His work has appeared in a variety of international newspapers including The Guardian, The Daily Telegraph, The Age and the South China Morning Post.
September 15, 2022

Cadence extends AI to verification data with unified database

Cadence has brought the inputs for its AI-driven tools under the umbrella of a big-data collection platform and added functional verification to the list of products that use machine learning.
August 31, 2022

Intel and partners join for RISC-V development push

Intel's Pathfinder for RISC-V is intended to boost the use of the architecture among a wider range of SoC design teams.
August 3, 2022

Imperas releases RISC-V coverage library as open source

Imperas Software has published an open-source functional-coverage library for RISC-V cores.
August 3, 2022

Accellera attempts to standardize CDC data

Accellera is on the first stage of setting up a working group to create a standard for exchanging information on clock domain crossing checks.
Article  |  Topics: Blog Topics, Blog - EDA, IP  |  Tags: , , ,   |  Organizations: ,
July 19, 2022

Teledyne pushes for optical for remote RF heads

Teledyne e2v has demonstrated a prototype optical link that the company believes could replace electrical signaling for remote RF heads.
Article  |  Topics: Blog - PCB  |  Tags: , , , ,   |  Organizations:
July 18, 2022

Open-source EDA grapples with the incentives issue

As the project that funded OpenRoad draws to a close, experts pondered its wider future at the 59th DAC.
July 14, 2022

‘Shocking’ quality sees vendors organize around RISC-V verification

Three EDA vendors team up to create stronger verification flow for RISC-V processor implementations.
July 13, 2022

Siemens pushes DRC to the left

Siemens has launched Calibre DRC engines that make it easier to perform useful checks early in the layout process.
Article  |  Topics: Blog - EDA  |  Tags: , , , ,   |  Organizations:
July 12, 2022

Devgan plans for optimization through machine learning

Cadence president expects expanded role for reinforcement learning in tool portfolio and looks for help on AI for verification.
Article  |  Topics: Blog - EDA  |  Tags: , , , , , ,   |  Organizations:
July 12, 2022

Siemens compiles analog into simulation for faster debug

Siemens EDA has launched a second version of its Symphony simulation environment designed to support quicker debug cycles.
Article  |  Topics: Blog - EDA  |  Tags: , , , , ,   |  Organizations: